NXP Semiconductors
LPC11C12/C14
Table 3.
LPC11C14 pin description table (LQFP48 package) …continued
Symbol
PIO3_5
V DD
Pin
21 [2]
8;44
Type
I/O
I
Description
PIO3_5 — General purpose digital input/output pin.
Supply voltage to the internal regulator, the external rail, and the ADC. Also
used as the ADC reference voltage.
XTALIN
6 [6]
I
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT
V SS
7 [6]
5; 41
O
I
Output from the oscillator amplifier.
Ground.
[1]
[2]
[3]
[4]
[5]
[6]
See Figure 25 for reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
reset the chip and wake up from Deep power-down mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 24 ).
I 2 C-bus pads compliant with the I 2 C-bus specification for I 2 C standard mode and I 2 C Fast-mode Plus.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 24 ).
5 V tolerant digital I/O pad without pull-up/pull-down resistors.
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
LPC11C12_C14_0
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 00.05 — 23 April 2010
? NXP B.V. 2010. All rights reserved.
8 of 49
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